Large-scale integration or VLSI chips integrate multiple high-level components, which are highly sophisticated gate-level circuits. Semiconductor Intellectual Property (IP) is the standard source for synthesizing higher-level components on VLSI chips or FPGA boards.
Semiconductor IPs typically provide the implementable, connected design of one of the following:
- A transformation
- An encryption or decryption algorithm
- Adaptive filtering of a signal
- The implementation of an internet or communication protocol such as HTTP, FTP, Bluetooth, USB or WiFi
However, because semiconductor companies collaborate with a network of design teams in different countries, there is a risk of IP leakage, which is the leakage of a user's real IP address while connected to a network. This is particularly true if the project is included in a semiconductor IP collection.
For this reason, it is essential that due diligence is followed and that such projects are visible only to authorized users and locations. In addition to the possibility of IP leakage, there is also the risk of IP theft. Either incident can cost an organization millions of dollars.
Typically, high-end semiconductor IPs are controlled technologies that require confidentiality to eliminate the risk of leaks or theft. IP geofencing is an effective measure to prevent both risks.
What is IP geofencing?
IP geofencing is a security measure that protects against IP leaks by restricting IP availability by geographic region. These restrictions are applied regardless of user access permissions, as leaks can be accidental or intentional.
Common causes of IP leaks are insufficient access controls, delivery of semiconductor IPs outside of managed interfaces, and untraceable embedded IPs. Geofencing prevents such risks.
How does geofencing work?
Access control and IP geofencing management work together. Semiconductor IPs are often protected by usage models. Design access is controlled through user permissions. Some users may have read-only access, while others are authorized to edit the designs, which involves creating a permissions hub.
The hub controls all intellectual property read and write permissions and manages the regional permissions that apply to each IP. An organization lists the different geographic regions, applying IP protection rules to each region of the IP portfolio.
Regional protection rules are typically applied in a hierarchy. If a protected IP is part of a larger IP tree, exporting the design can also lead to leaks. This is why geographic restrictions are applied across the entire IP hierarchy. Therefore, when a larger drawing is exported, access to the protected IP within the drawing is protected by geographic restrictions.
Chip designers in a restricted location can access the larger design with the support of partial workspaces. In this case, designers could use the protected IPs, but not access or edit them. IP geofencing always overrides user permissions.
Geofencing effectively prevents accidental and intentional IP leaks, which is essential to protect controlled technology and save costs.
