Making Watchdog Timer with NRF24LE1 Circuit
So far in the NRF24LE1 series, we have covered many interesting and special features that set the NRF apart from others. Today we are going to discuss an important feature of microcontrollers that helps them recover from failures. Suppose I give you a task to solve in a predefined time and you are unable to do it in the allotted time, then you have to start it from the beginning. The word 'Timeout' can be used here to clarify the concept.
Fig. 1: Watchdog Timer prototype based on NRF24LE1
But did you know that the microcontroller can also control the time and if it fails to complete the task in the allotted time, it can restart itself. This is done to prevent malfunctions and crashes. Or we can say that in case of system failure it restarts automatically. This also eliminates the need for a manual manual reset. It is an essential part in the design of remote and automated systems. The stopwatch used to keep track of time is known as Watchdog Timer. The name is clear. The Mars Rover also uses this functionality to recover from system failures and malfunctions.
Some features of the Watchdog Timer on the NRF24LE1 are:
• Minimum Watchdog timeout interval: 7.8125ms
• Maximum Watchdog timeout interval: 512 s
• Uses clock frequency of 32.768 KHz
• 16-bit register timer
To control the Watchdog we have WDSV registration. It contains a 16-bit counter value and is divided into two bytes – MSByte and LSByte. To write the counter value to this register, we first have to write LSByte and then MSByte. The same goes for reading the registry. The two bytes must be read or written continuously. We cannot read any bytes while writing and vice versa. Reading the WDSV register will always give the initial counter value or starting value. We cannot get the current value of the watchdog timer by reading WDSLV.
The watchdog timer is activated when two bytes are written. It counts down from WDSLV*256 to 0. When the counter value reaches 0, the microcontroller resets itself. This reset is the same as the hardware reset. To avoid resetting, we can register the WDSV with a new or the same value.
The counter will be reset if WDSV is written. This is done when our system is working properly and we don't want to restart.
The watchdog is disabled when the system is restarted or when we use NRF in record retention or memory retention modes. It uses a low frequency clock of 32.768 KHz. Before using the timer we have to activate the clock. This frequency can be supplied externally or derived from a 16 MHz crystal oscillator. The 32.768 KHZ source can be controlled by the CLKLFCTRL (Clock Low Frequency Control) register. The contents of this record are –:
• Bit 7 – Read CLKLF (phase)
• Bit 6 – CLKLF ready to use
• Bit 5:4 – Reserved
• Bit 3 – Read 16 MHz clock source. 1: Crystal Oscillator, 0: RC Oscillator
• Bit 2:0 – Source for CLKLF.
000: 32K Crystal
001: RC 32K
001: Synthesized from 16 MHz Crystal
011: From IO pin used as XC1 to XOSC32K (low amplitude signal)
100: From IO pin (rail-to-rail digital signal)
101: Reserved
110: Reserved
111: None selected
• First we have to enable the 32.768 KHz clock. For this we use the CLKLFCTRL registry. For simplicity, we will use synthesized clock. We can do this by writing 001 in Bit2:1.
• Then we have to check whether the clock has started or not. We can do this by checking Bit 6.
• After that we can write LSByte and then MSByte of WDSV.
#include"hal_delay.h" // header file containing delay functions
#include "hal_wdog.h" // watchdog function library
// main function
main void
{
CLKLFCTRL = 0x02; // starting clock 32,768
while(!( CLKLFCTRL & 0x40)); //waiting for the clock to start
P0DIR = 0; //port0 as output
P0 = 0xff; //port0 high
delay_ms(200); //wait 200ms
P0 = 0x00; //port0 low
hal_wdog_init(0x0200); // 4 second timeout
while(1); // Infinite loop
}
