Renesas Electronics Corporation, a provider of advanced semiconductor solutions, has launched the first clock buffers and multiplexers that meet stringent PCIe Gen6 specifications. The company is offering 11 new clock buffers and four new multiplexers.
These new devices, which also support and provide extra headroom for PCIe Gen5 implementations, complement Renesas' low-jitter 9SQ440, 9FGV1002 and 9FGV1006 clock generators to offer customers a complete PCIe Gen6 timing solution for data center/cloud computing, network and high performance. accelerate industrial applications.
The PCIe Gen6 standard supports extremely high data rates of 64 GT/s, requiring clock jitter performance of less than 100fs RMS. Renesas' new RC190xx clock buffers and RC192xx multiplexers have PCIe Gen6 additive jitter specifications of just 4fs RMS, making them virtually silent and thus future-proofing customer designs for the next generation of industry standards.
“PCIe Gen6 timing will be at the core of new equipment in data centers, high-speed networks and other applications,” said Zaher Baidas, vice president of Renesas’ timing products division. “As we have done in previous generations, Renesas is providing customers with the first timing solution to enable these new higher performance systems. Our customers know that we have the technical expertise and market knowledge to ensure their products will also be able to meet future needs.”
Characteristics
- Ultra-low 4fs PCIe Gen6 additive jitter, 1.4ns input-output delay, 35ps output skew, and -80dB power supply rejection ratio (PSRR) at 100kHz easily ensure a robust system design
- A 30% space saving compared to previous devices
- Selectable SMBus addresses allow for easy use of multiple devices
- SMBus write protection feature increases system security
- loss of signal (LOS) output supports monitoring and system redundancy
- Four-wire sideband interface supports high-speed serial output, enable/disable, and device chaining
- Flexible, shutdown-tolerant boot sequencing features ensure good behavior under abnormal system conditions
“By providing the first discrete timing solution for PCIe Gen6, Renesas is enabling customers to develop the next generation of high-performance systems,” said Rich Wawrzyniak, principal analyst at Semico Research. “It will be interesting to see the innovative implementations that result from this new capability, especially when considering how solutions for the emerging chip market are beginning to evolve, with the need to increase speed and bandwidth as an underlying constant.”
