In the previous tutorial, the concept and construction of flip flops was discussed. Flip-flops are essential components of any synchronous or timed operation. sequential circuit . Without flip-flops, a clocked sequential circuit is reduced to a combinational circuit. Even flip-flops are considered sequential circuits. There are two types of sequential circuits that are built exclusively from flip-flops – Registers and Counters.
A register is a group of flip-flops that have a common clock signal and are capable of storing or retaining binary information. Each flip-flop in a register is a binary cell capable of storing one bit of information. An n-bit register has a group of n flip-flops and is capable of storing any binary information containing n bits. The register is mainly used to store and transfer binary data entered into it from an external source.
Registers are used in a wide range of digital systems such as multipliers, dividers, memories, microprocessors, etc. A counter is a register that passes through a predetermined sequence of states. Although the registry does not have a specific sequence of states expected in certain specialized applications.
For example, below is a 4-bit register constructed by 4D flip-flops. All four register flip-flops have a common clock signal and a common reset signal (the D flip-flops here have a reset input to set the output to 0 by default). The parallel data from the external source is fed into the data input pins of D flip-flops. When the clock pulse (common to all flip-flops) is triggered, it is transferred into the output pins of D flip-flops. The reset input (common to all flip-flops) is active low, which by default is held at 1. When 0 is applied to the active low reset input, all flip-flops are reset to an output from 0.
Fig. 1: Memory register logic gate diagram
The record shown above is a parallel record and is the simplest type of record. These registers are commonly used in microprocessors and microcontrollers to store binary data. These register types transfer data from source to destination in parallel mode, preferred for faster computation in microprocessor and microcontroller designs. These types of registers used to store binary information are called memory registers.
Shift registers –
The other type of register commonly used in digital systems are shift registers. Shift registers are used to transfer binary data within a digital system. When shifting data, binary data is stored in a destination register (which may be a shift register) within a digital system. A shift register can shift binary information in the left direction (left shift), in the right direction (right shift), left but right (rotation), or left and right (bidirectional shift ). Data in a register can be entered serially or in parallel and can also be output serially or in parallel. Based on the serial or parallel mode of data input and output into the register, shift registers can be classified into the following four types –
1) Series – in Serial Output (SISO ) : – In this type of shift register, binary data is input, shifted and output serially in left or right direction, one bit at a time, under a common clock signal.
2) Series – in Parallel – output (SIPO ) : – In this type of shift register, binary data is entered and shifted serially in the left or right direction, one bit at a time, but is output in parallel all together under a clock signal .
3) Parallel – in Serial Output (PISO ) : – In this type of shift register, the binary data is input all together in parallel mode, but is shifted and output serially in the left or right direction, one bit at a time, under a clock signal.
4) Parallel – in Parallel – output (PIPO ) : – In shift register type, binary data is input as well as shifted and output in parallel mode, all together under a clock signal. This type of shift register is the same as a memory register built on D Flip Flops.
Unlike memory registers which are built by connecting the flip-flops in parallel, shift registers are built by connecting the flip-flops in cascade in a daisy chain fashion. Shift registers are constructed exclusively from D flip-flops. The size of the shift register is always equal to the size of the binary words used in a digital system. Just like a 4-bit digital system will have 4-bit words and therefore use 4-bit shift registers. Similarly, 8-bit digital system will have 8-bit words and therefore will use 8-bit shift registers. It should be noted that all flip-flops of a shift register have a common clock signal. It is a common clock signal that makes shift registers synchronous (sequential) circuits.
Serial-in-serial-out (SISO) shift register – A Serial-In Serial-out shift register accepts data serially, that is, one bit at a time on a single input line. It produces the information stored in its single output also in serial format. Data can be shifted left from MSB to LSB using shift left register or shifted right from LSB to MSB using shift right register. The SISO shift register is constructed by connecting D flip-flops in cascade as follows –
Fig. 2: Serial-in shift register logic gate diagram
Suppose a 4-bit binary word 1111 needs to be shifted in the SISO shift register. Before the clock signal arrives, let Q3 Q2 Q1 Q0 = 0000. This being the right shift register, the LSB of the binary word will be inserted into the input data bus (Din) first. Therefore Din = D3 = 1. On the first falling edge of the clock, Flip-Flop-3 is set and the word stored in the register is Q3Q2 Q1 Q0 = 1000.
Fig. 3: 4-bit serial-in shift register states on first pulse
Upon arrival of the second clock pulse, the next bit is passed to D in . So D em = 1 while Q3 is 1. As soon as the next negative clock edge reaches, FF-3 will be set to Din being 1 and FF-2 will be set to 1. Therefore, the stored word changes to Q 3 P 2 P 1 P 0 = 1100.
Fig. 4: 4-bit serial-in shift register states on second pulse
On arrival of the third clock pulse, the next bit to be stored, i.e. 1, is passed to D in . So D em is 1 while Q3 = 1 and Q2 = 1. Once the third negative clock edge reaches, FF-3 will be set to 1 by D em being 1, FF-2 will be set to 1 and FF-1 will be set as 1. Thus, the stored word changes to Q 3 P 2 P 1 P 0 = 1110.
Fig. 5: 4-bit serial-in shift register states on third pulse
On arrival of the fourth and final clock pulse, the MSB, i.e. 1, is passed to D in . Then D em is 1 while Q3 = 1, Q2 = 1 and Q1 = 1. Once the fourth negative clock edge reaches, FF-3 will be set to 1 by D em being 1, FF-2 will be set to 1, FF -1 will be set to 1 and FF-0 will be set to 1. So the stored word changes to Q 3 P 2 P 1 P 0 = 1111.
Fig. 6: 4-bit serial-in shift register states on fourth pulse
The operation of shift register can be summarized by the following table of functions –
Serial-In-Parallel-Out Shift Register (SIPO) – A Serial-In Parallel-Out Shift Register consists of a serial input and outputs are taken from all the flip-flops in parallel mode. In this register, data is transferred serially but shifted in parallel mode. To transfer data in parallel, it is necessary to have all data available at the outputs at the same time. After the data is stored, each bit appears on its respective output line and all bits are available simultaneously, rather than bit by bit, as is the case with serial output. A Serial-In Parallel-Out Shift Register can be constructed using D Flip Flops as follows –
Fig. 7: Logic gate diagram of serial input and parallel output shift register
Parallel Serial Output Shift Register (PISO) – For a register with parallel data inputs, bits are entered simultaneously into their respective flip-flops rather than bit by bit on a line.
As in a 4-bit Parallel-In Serial-Out register, there are four parallel data – input lines designated as A, B, C and D and SHIFT/LOAD is a control input that allows the four data bits in A, Inputs B, C and D to enter the register in parallel or shift data in series. When SHIFT/LOAD is LOW, AND gates G1 to G3 are enabled, allowing data on parallel inputs, that is, A, B, C and D, to the data inputs of the respective flip-flops. Input A is directly connected to input D of the first flip-flop. When a clock pulse is applied, flip-flops with D = 1 will be SET and flip-flops with D = 0 will be RESET, thus storing all four bits simultaneously.
When SHIFT/LOAD is HIGH, AND gates G1 through G3 are disabled and the remaining AND gates G4 through G6 are enabled, allowing data bits to change from one stage to the next. OR gates allow normal shift operation or parallel data input operation, depending on which AND gates are enabled by the level at the SHIFT/LOAD input. A Parallel-In Serial-Out shift register can be constructed using D Flip Flops as follows –
Fig. 8: Parallel serial-out shift register logic gate diagram
Parallel-in-parallel-out (PIPO) shift register – In this type of register, data inputs can be shifted into or out of the register in parallel. Parallel data input is performed as in a Parallel-In Serial-Out shift register. Furthermore, in this register, there is no interconnection between successive flip-flops as no serial switching is required. Therefore, when the parallel input of the input data is performed, the respective bits will appear in the parallel outputs. A simple 4-bit Parallel-In Parallel-Out shift register built using D flip-flops is as follows –
Fig. 9: Input and output parallel shift register logic gate diagram
Here the parallel inputs to be inserted must be applied to inputs A, B, C and D that are directly connected to the delay inputs of the respective flip-flops. Now, when applying the clock pulse, these inputs are inserted into the register and are immediately available at outputs Q1, Q2, Q3 and Q4. This type of shift register is similar to a memory register built using D Flip Flops.
Universal Shift Registers – Universal shift registers can shift binary data in any direction and can input and output it both in series and in parallel. It has additional control inputs to specify the direction of data movement, input mode, and output mode.
In the next tutorial, learn about the other sequential circuit built exclusively by flip-flops – Counters .
