Midrange FPGAs and System-on-Chip (SoC) FPGAs have played an important role in moving computer workloads to the network edge. Microchip Technology helped drive this transition with its award-winning FPGAs, delivering the first RISC-V-based FPGAs that deliver twice the power efficiency of competing midrange FPGAs – and feature best-in-class design, operating system and cutting-edge features . ecosystem of solutions.
The company will showcase its solutions at the 2022 RISC-V Summit and showcase its PolarFire 2 FPGA silicon platform and RISC-V-based processor subsystem and software suite roadmap. It will also discuss a RISC-V-based high-performance spaceflight computing (HPSC) processor it is developing for NASA and the aerospace and defense industry.
“Microchip was the first to offer FPGAs for energy-efficient edge computing segments and the first to bring SoC FPGAs to volume production that support the RISC-V open instruction set architecture,” said Shakeel Peera, vice president of marketing for Microchip's FPGA business. unit. “At this year’s summit, we are extremely excited to showcase our production-ready PolarFire SoC family, partner ecosystem, and solutions for today’s power-sensitive edge computing systems. An added bonus will be a preview of the next step to bring 15x more computing power to our roadmap.”
The PolarFire FPGA and PolarFire SoC families already offer industry-leading thermal and power efficiency in the mid-range segment. Optimized for deploying systems with high computational performance in small form factors, the families have reduced the size and weight of power-constrained systems in applications including industrial imaging, robotics, AI-enabled medical systems, and intelligent defense and aerospace systems.
The PolarFire 2 family will go even further up the performance and power efficiency curve and add new RISC-V-based high-performance computing elements. It also includes a set of design tools that takes a new approach to systems development, unlocking the full potential of these FPGAs and SoC FPGAs, eliminating the need for intelligent algorithm developers to understand the complexities of the underlying FPGA hardware.
Microchip will also showcase its Mi-V ecosystem of solutions to support the development of the RISC-V-based solution stack. It provides more than 90% coverage for commercial and open source operating system (OS) and real-time operating system (RTOS) packages, and includes other software, middleware, and firmware offerings from Microchip and its Microchip ecosystem partners. v.
RISC-V Summit attendees can see Microchip's PolarFire family and Mi-V ecosystem, PolarFire 2 family and design toolset preview, and HPSC offerings on December 13-14, 2022, at booth # PG5, Hall 2, at the San Jose McEnery Convention Center in San José, California.
Attendees will be able to learn more about Microchip during the following conference presentations:
- “RISC-V Spotlight: Microchip's RISC-V Journey to Deliver Innovation from Edge Compute to the Edge of the Solar System,” Bruce Weyer, Corporate Vice President, FPGA, Microchip, on December 13 in Hall 3, 11:00 a.m. to 11:10 a.m. am
- “RISC-V Enabling High-Performance Spaceflight Computing,” on December 14 in Hall 3, 9:40 a.m. to 9:55 a.m.
For complete information about Microchip's FPGA families click here.
