Kirchhoff's voltage law and Kirchhoff's current law
Luciano Bertene
Kirchhoff's current law (KCL)
Let's consider a node. The figure shows the complex network. At this junction when I 1 =2A, I 2 =4A and I 3 =1A to then determine the current I 4 We say that the sum of the current flowing is 4+4=8A, while the sum of the current leaving the circuit is 2 +I. 4 A
So I 4 = 6A.
This study of the currents entering and leaving the circuit is nothing more than the application of Kirchhoff's current law. This KCL (Kirchhoff's law) can be expressed as follows:
The sum of the currents flowing towards a junction is equal to the sum of the currents flowing away from the junction.
This law can also be expressed as follows:
The algebraic sum of all currents that meet at a point O is always zero. The letter means algebraic with regard to the signs of various currents.
ΣI at node O = 0
In the figure above, the currents are I 1 and I 2 are positive while I 3 and I 4 are negative.
Application of KCL, ΣI at node O = 0
I 1 + I 2 - I 3 - I 4 = 0
I.e. ME 1 + ME 2 = ME 3 + ME 4
This Kirchhoff law is very useful in simplifying networks.
PN junction diode
Kirchhoff Voltage Law (KVL):
In any network, the algebraic sum of the voltage drops in the circuit elements of a closed circuit is equal to the algebraic sum of all voltages in the branches and is always equal to zero in any closed circuit or loop.
To create a closed path Σv=0
The law states that if someone starts at a certain point on a closed path and continues tracing and detecting all potential changes (rises or falls) in a certain direction until they reach the starting point again, they must be at the same potential, with which he began to follow the closed path.
The sum of all increases in potential must be equal to the sum of all decreases in potential if we follow a closed circuit path. The total potential change along a closed path is always zero.
This law is very useful in network loop analysis.
Types of semiconductors
Drawing conventions to observe when using KVL
Voltage drop occurs across the resistor when a current flows through the resistor. The polarity of this voltage drop always depends on the direction of the current. Current always flows from the highest to the lowest potential.
In Fig (a), current I flows from right to left, so point B has higher potential than point A, as shown in Fig.
In Fig (b), current I flows from left to right, so point A is at a higher potential than point B, which is also shown.
Once we have marked all these polarities in the given circuit, we can apply KVL to any closed path in the circuit.
Now, when tracing a closed path, if we go from the terminal marked -ve to the terminal marked +ve, this voltage must be considered positive. This is called potential increase.
For example, if branch AB is drawn from A to B, the fall above it should be considered a rise and assumed to be +IR when writing the equations.
When tracing a closed path, if we move from the terminal marked + to the terminal marked -, then this voltage must be considered negative. This is called voltage drop.
For example, only in Fig. (a) should the branch, when drawn from B to A, be considered negative, i.e., -IR, when writing the equations.
Similarly in Fig. (b): when the branch is drawn from A to B, there is a voltage drop and the term must be written negative as -IR when writing the equation. As the branch is drawn from B to A, there is an increase in voltage and the term must be written positive as +IR when writing the equation.
In Fig. (b), current I flows from left to right, so point A is at a higher potential than point B, as shown.
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