As artificial intelligence (AI) technology is integrated into massive data centers, the demand for superior performance will continue to increase. Following this trend, high power density and energy efficiency solutions for intelligent enterprise systems have also become a challenge.
As a result, Infineon Technologies has introduced a new family of OptiMOS 5 IPOL buck regulators with VR14-compliant SVID standard and I²C/PMBus digital interfaces for Intel/AMD server CPUs and network ASICs/FPGAs.
Housed in a 5 x 6 mm² PQFN package, these devices are an easy-to-use, fully integrated and highly efficient solution for next-generation server, storage, telecommunications and data communications and distributed energy systems applications.
The OptiMOS IPOL TDA38640 Single Voltage Synchronous Buck Regulator supports output current up to 40 A. The device comes with Intel SVID and I²C/PMBus digital interfaces and can be used for Intel VR12, VR12.5, VR13, VR14, IMPVP8 and DDR memory without significant changes to the bill of materials (BOM).
Infineon's IPOL buck TDA38740 and TDA38725 digital regulators support output current up to 40 and 25 A, respectively, and come with a PMBus interface. All three new devices use Infineon's proprietary Fast Constant Time (COT) PWM engine to provide industry-leading transient performance while simplifying design development.
The integrated PWM controller and OptiMOS FETs with integrated startup diode make these new devices a compact solution with highly efficient power delivery. Additionally, they provide the versatility needed by operating over a wide input and output voltage range while offering programmable switching frequencies from 400 kHz to 2 MHz.
Multi-programmable memory enables customization during design and high-volume manufacturing, significantly reducing design cycles and time to market. They also offer a digitally programmable load line that can be defined via configuration registers without external components, resulting in a simplified BOM. The device configuration can be easily defined using Infineon's XDP Designer GUI and is stored in the chip's memory.